Sarah Armstrong

Introduction

This effort is in collaboration with Boeing Space Systems Development group. Boeing designed a radiation-hardened by design (RHBD) Serializer-Deserializer (SerDes). Single-event transient simulations were performed on the full SerDes transmitter driver circuitry as well as specific circuit modules using the Cadence EDA tool suite with the Spectre circuit simulator.

 

Single-Event Effect Simulation

The full transmit driver (Fig. 1) was simulated at 1562.5 Mbps (half of the maximum data rate) with a checkerboard data pattern to emulate the worst-case situation and to allow upsets to be easily identified at the output. To simulate the charge collection from a heavy-ion strike, a piece-wise-linear current source was sequentially inserted and simulated in the circuitry for every PMOS and NMOS drain node.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fig. 1: The transmitter amplifier block diagram is shown with the 6dB pre-amp identified along with a graph of a representative of the PWL transient current injected into each circuit node.

 

For each simulated heavy-ion strike, the resulting transient response of the driver is analyzed for errors by calculating each clock period (determined by finding the difference between the midpoints of each consecutive rising edge) and comparing this period to the ideal (or expected) period to determine a percent phase error. For each phase error in excess of a predetermined error threshold, an error is recorded, as shown in Fig. 2.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fig 2. Simulation error calculation example: the difference between the ideal and measured periods is recorded as te. If te exceeds an upset threshold, an error is recorded.

 

These simulations are used to identify the sensitive regions of the circuit and focus primarily on qualitative rather than quantitative results. The circuit block identified as the most sensitive to SET, the 6dB pre-amp in this case, is then simulated at the full data rate (3.125 Gbps) to characterize a circuit module for electrical and single-event laser testing.

 

Fig. 3: Simplified 6 dB pre-amp. T0/T1 and T9/T10 are the differential amplifiers, T2/T3 is the output stage, and the current mirror includes each of the transistors at the bottom of the figure. The current drive increases from left to right on the schematic.